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[source in ebook] RX_FARM_24_DATA

Description: verilog代码，串口接收程序，有协议-Verilog code, the receiver program, agreement
Platform: | Size: 2048 | Author: yuan | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: verilog程序包 包括数码管显示 lcd 红外线接收和读取 -Verilog package includes digital display lcd infrared receiver and read
Platform: | Size: 9709568 | Author: 小白菜 | Hits:

[Post-TeleCom sofeware systems] gardner_test

Description: 无线通信中接收机的位同步，采用的gardner算法实现的verilog程序，需要自己综合编译-Wireless communication receiver bit synchronization algorithm used gardner the verilog program needs its own comprehensive compilation
Platform: | Size: 7168 | Author: libo | Hits:

[Other] yaokong

Description: 直流电机CPLD 控制程序，VERILOG 写的。 程序分两部分，一部分是遥控按键板的程序，一部分是接收端控制L298的程序，全部采用EPM1270编写，程序都经过实际测试。大家在使用L298的时候特别注意，L298容易烧坏掉，主要原因是过流，所以请选择电机的时候要测量下电机的内阻或者是清楚电机的功率，还有L298 如果让电机停止的时候，不要给PWM波，给PWM波又让停转的话，L298发热也厉害。-CPLD DC motor control procedures, VERILOG written. Program in two parts, one part is the remote control button board procedures, part of the L298 receiver control procedures, all using EPM1270 written procedures after the actual test. When we use special attention L298, L298 easy to burn out, mainly due to over-current, so please select the motor when the motor to measure the internal resistance or electrical power are clear, there L298 if the motor is stopped when the Do not give PWM wave, the PWM wave stopped letting the words, L298 fever is also powerful.
Platform: | Size: 657408 | Author: huanghui | Hits:

[Other] fuyaokongban

Description: 直流电机CPLD 控制程序，VERILOG 写的。 程序分两部分，一部分是遥控按键板的程序，一部分是接收端控制L298的程序，全部采用EPM1270编写，程序都经过实际测试。大家在使用L298的时候特别注意，L298容易烧坏掉，主要原因是过流，所以请选择电机的时候要测量下电机的内阻或者是清楚电机的功率，还有L298 如果让电机停止的时候，不要给PWM波，给PWM波又让停转的话，L298发热也厉害。 几个程序分开上次了，大家自己找我的上次文件-CPLD DC motor control procedures, VERILOG written. Program in two parts, one part is the remote control button board procedures, part of the L298 receiver control procedures, all using EPM1270 written procedures after the actual test. When we use special attention L298, L298 easy to burn out, mainly due to over-current, so please select the motor when the motor to measure the internal resistance or electrical power are clear, there L298 if the motor is stopped when the Do not give PWM wave, the PWM wave stopped letting the words, L298 fever is also powerful. Separate the last several programs, and we find my own last file
Platform: | Size: 694272 | Author: huanghui | Hits:

[Other] CHETIKONGZHI

Description: 直流电机CPLD 控制程序，VERILOG 写的。 程序分两部分，一部分是遥控按键板的程序，一部分是接收端控制L298的程序，全部采用EPM1270编写，程序都经过实际测试。大家在使用L298的时候特别注意，L298容易烧坏掉，主要原因是过流，所以请选择电机的时候要测量下电机的内阻或者是清楚电机的功率，还有L298 如果让电机停止的时候，不要给PWM波，给PWM波又让停转的话，L298发热也厉害。 几个程序分开上次了，大家自己找我的上次文件-CPLD DC motor control procedures, VERILOG written. Program in two parts, one part is the remote control button board procedures, part of the L298 receiver control procedures, all using EPM1270 written procedures after the actual test. When we use special attention L298, L298 easy to burn out, mainly due to over-current, so please select the motor when the motor to measure the internal resistance or electrical power are clear, there L298 if the motor is stopped when the Do not give PWM wave, the PWM wave stopped letting the words, L298 fever is also powerful. Separate the last several programs, and we find my own last file
Platform: | Size: 1965056 | Author: huanghui | Hits:

[VHDL-FPGA-Verilog] DE2_115_IR

Description: Verilog IR Receiver decodes and process signal through FPGA and display on the 7-segment displays in hrxadecimal format.
Platform: | Size: 115712 | Author: KWIer | Hits:

[VHDL-FPGA-Verilog] EX7

Description: 一个基于verilog的串口接收发送模块，可与上位机通信。-One based on the serial receiver sends verilog module can communicate with the host computer.
Platform: | Size: 326656 | Author: 陈栋磊 | Hits:

[VHDL-FPGA-Verilog] RS-422standardmodulev2

Description: rs422标准通讯模块 异步收发 verilog语言编写-rs422 standard communication module asynchronous receiver verilog language
Platform: | Size: 8192 | Author: 蒋大鹏 | Hits:

[VHDL-FPGA-Verilog] uart_rx

Description: receiver module of uart protocol in verilog hdl
Platform: | Size: 1024 | Author: Srikanth | Hits:

[VHDL-FPGA-Verilog] CODE_GEN

Description: 北斗、GPSC/A码生成器的verilog ，输出速率可调，使用verilog编写- FPGA-based GPS receiver complete code of the spreading code generator design using verilog language
Platform: | Size: 1024 | Author: 刘先生 | Hits:

[ELanguage] bin_count

Description: i m sending hdl code of dm using verilog and vhdl with all blocks contain fft,ifft,scrambler,transmitter,receiver.-i m sending hdl code of ofdm using verilog and vhdl with all blocks contain fft,ifft,scrambler,transmitter,receiver.
Platform: | Size: 28672 | Author: Nilesh panchal | Hits:

[VHDL-FPGA-Verilog] uart_8

Description: 用verilog描述的串口通信接口，主体为接收机和发送机两个模块-Serial communication interface with Verilog description, subject to a receiver and transmitter module two
Platform: | Size: 2048 | Author: MR_shang | Hits:

[source in ebook] OFDM-based-on-FPGA

Description: 用FPGA实现OFDM系统，硬件语言为Verilog，环境为xilinx，详细介绍了接收机和发射机各个模块的源代码-OFDM system with a FPGA implementation, hardware language Verilog, environment xilinx, details of receiver and transmitter modules source code
Platform: | Size: 3803136 | Author: 吴淑金 | Hits:

[Special Effects] FPGA_DVI_receiver

Description: 基于verilog编写的DVI解码器设计，同时也适用HDMI解码-dvi receiver and HDMI receiver
Platform: | Size: 10240 | Author: 韦科 | Hits:

[VHDL-FPGA-Verilog] CFO

Description: zedboard/AD9361平台进行无线收发，在接收端进行频偏估计和补偿的Verilog参考代码。-zedboard/AD9361 platform for wireless transceiver, the receiver frequency offset estimation and compensation, you can refer to the Verilog code.
Platform: | Size: 1024 | Author: 何晨光 | Hits:

[VHDL-FPGA-Verilog] kbb

Description: It is a Verilog code for PS2 keyboard/mouse receiver interface. It is very easy to use.
Platform: | Size: 1024 | Author: eren | Hits:

[VHDL-FPGA-Verilog] UART_rec

Description: 用Verilog语言写的串口接收程序。通过串口助手发送数据，在数据输出端可以看到发送的数据。（需要自己分配FPGA引脚)-Verilog language used to write the serial receiver. Send data through the serial port assistant. It can be seen at the data output terminal of the data transmission. (Need to assign your own FPGA pin)
Platform: | Size: 1024 | Author: 毛毛 | Hits:

[VHDL-FPGA-Verilog] GTX4

Description: 光纤发送接收模块，verilog编写，主要用于光纤的发送和接收，波长1310nm-Fiber optic transmitter receiver module, verilog written primarily for transmitting and receiving the optical fiber, wavelength 1310nm
Platform: | Size: 5495808 | Author: 维斯摩尔 | Hits:

[VHDL-FPGA-Verilog] uart_rx

Description: 基于verilog的uart接收模块，16倍波特率采样，具有可选择奇偶校验功能，仿真成功。-Based verilog the uart receiver module, sampling 16 times the baud rate, parity function with selectable, successful simulation.
Platform: | Size: 1024 | Author: Liu | Hits:
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